1. Field of the Invention
The present invention relates to a modulation circuit for outputting pulse signals modulated in accordance with the values of input data at a predetermined period and an image display and a modulation method using the modulation circuit and, more particularly, relates to a modulation circuit of a drive signal for a light-emitting diode (LED) and an image display comprising LEDs.
2. Description of the Related Art
Since the invention of the blue LED, LED color displays that use LEDs to form pictures by pixels emitting the three primary colors have been widely and generally fabricated. LEDs are highly durable and can be used semi-permanently, so they are optimal for long-term use outdoors. Therefore, LEDs have been extensively used for large-scale displays in stadiums and event sites and for information display panels and advertisements on sides of buildings and inside railway stations. In recent years, along with the increasing luminance and lower prices of blue LEDs, such LED color displays have been spreading rapidly.
FIG. 1 is a view of a drive circuit of an LED forming a pixel of an LED display.
In FIG. 1, reference numeral 100 indicates a drive circuit and 200 an LED. In addition, Spx represents a video signal supplied to each individual pixel; and, Id represents a current flowing through the LED 200.
The drive circuit 100 outputs a current corresponding to the video signal Spx to the LED 200, while the LED 200 emits light according to the supplied current. An LED display is comprised of exactly the same number of circuits consisting of the drive circuits 100 and LEDs shown in FIG. 1 as that of the pixels. By making the LEDs of the pixels emit light with luminances according to the video signals Spx supplied to the pixels, a person viewing the screen can recognize a picture. The video signal Spx supplied to each pixel is generally input to the drive circuit 100 as a digital value of a certain number of bits.
FIG. 2 is a view of the waveform of the current flowing through the LED 200 in FIG. 1.
In FIG. 2, the ordinate and abscissa indicate the current flowing through the LED 200 and time by relative values, respectively. In addition, Ipulse indicates the peak value of the pulse-shape d current flowing through the LED, tw indicates the time width of the current pulse, and T indicates the period of the current pulse.
As shown in FIG. 2, the current flowing through the LED forming a pixel of an LED display has a periodic pulse-like waveform. The luminance is controlled by pulse width modulation to make the pulse width tw variable.
In principle, it is possible to use a direct current as that flowing through the LED and make the current value variable in accordance with the video signal Spx to adjust the luminance, but in this case, it is necessary to finely control the current value by the drive circuit, and there is a disadvantage that the circuit for this control ends up increasing the number of parts. Because it is easier to increase the resolution of the time than the resolution of the current value, in general, the pulse width modulation system generating a current of a waveform as shown in FIG. 2 is adopted.
Due to the nature of human senses, light blinking in a manner staying lit for less than {fraction (1/60)} of a second is perceived to have a constant luminance. Therefore, even a LED is driven by a current of the waveform shown in FIG. 2, if the period T of the current is shorter than the aforesaid time, the blinking light from the LED will be perceived by people as light of a constant luminance. Further, the luminance of an LED perceived by the human senses is proportional to the current flowing through the LED averaged over time. Therefore, the luminance changes in proportion with the duty of the pulse current.
The level of a video signal input to an LED display, however, is normalized in advance to match the luminance characteristics of a cathode ray tube (CRT). If such a video signal is input as it is to an LED, which has different luminance characteristics from a CRT pixel, the following problem arises.
FIG. 3 is a view of the relation of the luminances of a LED and CRT pixel with the level of an input signal.
In FIG. 3, the ordinate represents the luminance of a LED or CRT pixel, while the abscissa represents the level of the signal input to a LED or a CRT pixel all by relative values. The curves indicated by A and B show the luminance characteristics of a CRT pixel and a LED, respectively.
Note that for the luminance characteristic A of a CRT pixel, the signal level is expressed by the voltage value of the video signal, while for the luminance characteristic B of an LED pixel, the signal level is expressed by the value of the current flowing through the LED.
As shown in FIG. 3, the luminance of an LED has a linear relation with the signal level, while the luminance of a CRT pixel has a nonlinear relation with the signal level. In general, the luminance of a CRT pixel is proportional to the 2.2th power of the voltage level of the video signal (xcex3 characteristic). If a current proportional to a video signal normalized to match such a xcex3 characteristic is directly supplied to an LED, the LED appears brighter than a CRT pixel in the region of low output of light, but it appears darker than a CRT pixel in the region of high output of light. Consequently, a picture formed by such pixels has a ratio of luminance of the bright portions and dark portions different from the original picture, so it looks unnatural to viewers.
In order to solve this problem, in an LED display of the related art, a signal corrected to eliminate the influence due to the above luminance characteristic of the video signal is input to the drive circuit 100 as the above video signal Spx. Specifically, for example, when driving an LED of a linear luminance characteristic by a video signal produced to match a CRT pixel emitting light of a luminance proportional to the 2.2th power of the signal level, a signal proportional to the 2.2th power of the video signal is generated to drive the LED.
However, if the bit length of the input video signal is not sufficiently large, the binary data obtained by raising this digitalized image data to the 2.2th power is incapable of expressing fine changes of value in the region where the value of the input video signal is small. In other words, if the bit length of the digitalized video signal is small, the grey scale ends up rough in the low luminance region, resulting in an unnatural picture. In order to avoid such a problem, it is necessary to increase the bit length of the video signal. Specifically, in a LED display of the related art, it is necessary to generate a video signal of a length of 12 to 16 bits to reproduce a picture which can be expressed by a video signal of a length of 8 bits in the case of a CRT. If the bit length of the video signal is increased in this way, the bit length of the pulse width modulation circuits for driving the LEDs also has to be increased, so the overall circuit scale becomes large and the cost and power consumption rise.
Further, a pulse of the waveform shown in FIG. 2 is generally generated by counting clock signals serving as a time reference. Increasing the bit length of the video signal means increasing the number of times to count the clock signals by that extent, so when using clock signals of the same frequency, the period T of pulse width modulation ends up longer. For example, when generating a 12-bit video signal, which is 4 bits larger than an 8-bit video signal, performing pulse width modulation for it and comparing it with the same frequency of the clock signal, the period T of pulse width modulation becomes 16 times that of an 8-bit video signal. Since the period T of pulse width modulation is set according to the characteristic of the human senses described above, if this period is too long, flickering where the blinking of the light will be perceived by the human eyes will be caused and the picture will become hard to view. Furthermore, this flickering by nature is more noticeable to the human eyes in a LED display compared with a CRT display, so the period T of pulse width modulation has to be several times shorter than that of the usual refresh rate, for example, {fraction (1/50)} of a second.
To increase the bit length of video signals and shorten the period T of pulse width modulation, it is enough to increase the frequency of the clock signals used in the pulse width modulation circuit, but this has the disadvantage of increasing the power consumption of the circuit. Further, in practice, as it is difficult to further increase the current frequency of 10 to 20 MHZ 10 or more fold, there is a limit to increasing the frequency of the clock signal.
An object of the present invention is to provide a modulation circuit for modulating input data on a pulse width in response to the value of the input data and generating a pulse signal at a predetermined period that is able to be set to match the relation of the input data and the pulse width with a certain characteristic without increasing the bit length of the input data or adding any process, such as making corrections to the input data, and to provide an image display provided with the modulation circuit.
In order to achieve the object, according to a first aspect of the present invention, there is provided a modulation circuit for modulating input data on a pulse width and a pulse amplitude in response to the value of the input data and generating a pulse signal at a predetermined period, comprising a phase data generating circuit for generating phase data whose value is varied in response to a phase in the period, a data comparison circuit for setting a control signal at a first level at the beginning of every period, comparing the phase data and the input data, and setting the control signal at a second level when the phase data and the input data coincide, and a pulse signal generating circuit for setting the level of the pulse signal at a reference level at the beginning of every period, changing the level of the pulse signal in response to the phase data when the control signal is at the first level, setting the level of the pulse signal at the reference level when the level of the control signal is changed to the second level, and outputting the resultant pulse signal.
According to the modulation circuit related to the first aspect of the present invention, in the phase data generating circuit, the phase data corresponding to the phase in the period are generated. In the data comparison circuit, the control signal is at the first level at the beginning of every period, the phase data and the input data are compared, and the control signal is set at the second level when the phase data and the input data coincide. The level of the pulse signal output from the pulse signal generating circuit is set at a reference level at the beginning of every period, changed in response to the value of the phase data when the control signal is at the first level, and set at the reference level when the control signal is changed to the second level.
Preferably, when the control signal is at the first level, the pulse signal outputting circuit changes the level of the pulse signal in proportion to the product of input pulse amplitude data and the phase data.
Further, the pulse signal outputting circuit may comprise a first conversion circuit for converting input pulse amplitude data into an analog signal having a level corresponding to the value of the input data and a second conversion circuit for converting the phase data into the pulse signal having a level corresponding to the value of the phase data with the analog signal as a reference. Alternatively, the pulse signal outputting circuit may comprise a multiplier for multiplying the value of the input pulse amplitude data with that of the phase data and a conversion circuit for converting the multiplication result from the multiplier into the pulse signal having a level corresponding to the value of the result. In addition, the phase data generating circuit may count input clock pulses, initialize the count to a preset initial value and count the clock pulses again when the count reaches a preset value, and output the count as the phase data.
According to a second aspect of the present invention, there is provided a modulation circuit for modulating input data on a pulse width and pulse amplitude in response to the value of the input data and generating a pulse signal at a predetermined period, comprising a data outputting circuit which compares the input data with a plurality of preset initial phase data at phases of the period corresponding to the initial phase data, and as a result of the comparison, outputs pulse width data corresponding to a difference between a value of one of the initial phase data and that of the input data and a specified pulse amplitude data corresponding to the initial phase data when the phase corresponding to one of the initial phase data is earlier than the phase corresponding to the input data, a phase data generating circuit for generating a phase data whose value is varied in response to a phase in the period, a data comparison circuit for setting a control signal at a first level at the beginning of every period, comparing the phase data and the pulse width data, and setting the control signal at a second level when the phase data and the pulse width data coincide, and a pulse signal generating circuit for setting the pulse signal at a reference level at the beginning of every period, changing the level of the pulse signal in response to the pulse amplitude data when the control signal is at the first level, setting the pulse signal at the reference level when the control signal is changed to the second level, and outputting the resultant pulse signal.
According to the modulation circuit related to the second aspect of the present invention, at phases of the period corresponding to the plurality of preset initial phase data, the input data is compared with the values of the initial phase data by the data outputting circuit. As a result of the comparison, pulse width data corresponding to a difference between a value of one of the initial phase data and that of the input data and specified pulse amplitude data corresponding to the initial phase data are output when the phase corresponding to one of the initial phase data is earlier than the phase corresponding to the input data. In the phase data generating circuit, the phase data corresponding to a phase in the period are generated. In the data comparison circuit, the control signal is at the first level at the beginning of every period, the phase data and the pulse width data are compared, and the control signal is set at the second level when the phase data and the pulse width data coincide. The level of the pulse signal output from the pulse signal generating circuit is set at a reference level at the beginning of every period, changed in response to the value of the pulse amplitude data when the control signal is at the first level, and set at the reference level when the control signal is changed to the second level.
Further, the data outputting circuit may count input clock pulses, initialize the count to a preset initial value and count the clock pulses again when the count reaches a preset value, and compare one of the initial phase data with the value of the input data at a phase where the count coincides with the initial phase data.
Further, the phase data generating circuit may also count input clock pulses, initialize the count to a preset initial value and count the clock pulses again when the count reaches a preset value, and output the count as the phase data.
According to a third aspect of the present invention, there is provided an image display comprising a plurality of modulation circuits each modulating input data on a pulse width and a pulse amplitude in response to the value of the input data and generating a pulse signal at a predetermined period and a plurality of light emitting elements arranged bi-dimensionally to form an image displaying member and each emitting light of a luminance corresponding to levels of the pulse signals, wherein each modulation circuit comprises a phase data generating circuit for generating phase data whose value is varied in response to a phase in the period, a data comparison circuit for setting a control signal at a first level at the beginning of every period, comparing the phase data and the input data, and setting the control signal at a second level when the phase data and the input data coincide, and a pulse signal generating circuit for setting the level of the pulse signal at a reference level at the beginning of every period, changing the level of the pulse signal in response to the phase data when the control signal is at the first level, setting the level of the pulse signal at the reference level when the level of the control signal is changed to the second level, and outputting the resultant pulse signal.
According to the image display related to the third aspect of the present invention, in the plurality of modulation circuits, pulse widths and pulse amplitudes of the input data are modulated in response to the value of the input data and pulse signals are generated at a predetermined period. The plurality of light emitting elements emit light of luminances corresponding to levels of the pulse signals, and an image is displayed by the image displaying member.
In addition, in the phase data generating circuit of each modulation circuit, the phase data corresponding to the phase in the period are generated. In the data comparison circuit, the control signal is at the first level at the beginning of every period, the phase data and the input data are compared, and the control signal is set at the second level when the phase data and the input data coincide. The level of the pulse signal output from the pulse signal generating circuit is set at a reference level at the beginning of every period, changed in response to the value of the phase data when the control signal is at the first level, and set at the reference level when the control signal is changed to the second level.
Preferably, each modulation circuit comprises a first input terminal into which the input data are input, a first output terminal from which the input data is are output, a second input terminal into which an enable signal is input, a second output terminal from which the enable signal is output, an enable signal generating circuit for outputting the enable signal from the second output terminal when the enable signal input from the second input terminal changes from the enable state to the disenable state, said enable signal being set to an enable state for a predetermined period and then to a disenable state, and a data holding circuit for holding the input data input from the first input terminal when the enable signal is in the enable state and outputting the held input data when the enable signal changes from the enable state to the disenable state, and the first output terminal and the second output terminal of each modulation circuit are connected in cascade with the first input terminal and the second input terminal of a modulation circuit at the next stage, respectively, and the phase data generating circuit sets the value of the phase data to a preset initial data when the enable signal is in the enable state, and periodically changes the value of the phase data at said period when the enable signal is in the disenable state, and the data comparison circuit sets the control signal to the second level when the enable signal is in the enable state, and compares an input data output from the data holding circuit with the phase data when the enable signal is in the disenable state.
Further, preferably, when the control signal is at the first level, the pulse signal outputting circuit changes the level of the pulse signal in proportion to the product of the input pulse amplitude data and the phase data.
According to a fourth aspect of the present invention, there is provided an image display comprising a plurality of modulation circuits, each modulating input data on a pulse width and a pulse amplitude in response to the value of the input data and generating a pulse signal at a predetermined period, and a plurality of light emitting elements arranged bi-dimensionally to form an image displaying member and each emitting light of a luminance corresponding to levels of the pulse signals, wherein each modulation circuit comprises a data outputting circuit which compares the input data with a plurality of preset initial phase data at phases of the period corresponding to the initial phase data, and as a result of the comparison, outputs a pulse width data corresponding to a difference between a value of one of the initial phase data and that of the input data and a specified pulse amplitude data corresponding to the initial phase data when the phase corresponding to one of the initial phase data is earlier than the phase corresponding to the input data, a phase data generating circuit for generating a phase data whose value is varied in response to a phase in the period, a data comparison circuit for setting a control signal at a first level at the beginning of every period, comparing the phase data and the pulse width data, and setting the control signal at a second level when the phase data and the pulse width data coincide, and a pulse signal generating circuit for setting the level of the pulse signal at a reference level at the beginning of every period, changing the level of the pulse signal in response to the pulse amplitude data when the control signal is at the first level, setting the level of the pulse signal at the reference level when the level of the control signal is changed to the second level, and outputting the resultant pulse signal.
According to the image display related to the fourth aspect of the present invention, in the plurality of modulation circuits, pulse widths and pulse amplitudes of the input data are modulated in response to the value of the input data and pulse signals are generated at a predetermined period. The plurality of light emitting elements emit light of luminances corresponding to levels of the pulse signals, and an image is displayed by the image displaying member.
Further, in each modulation circuit, at phases of the period corresponding to the plurality of preset initial phase data, the input data is compared with the values of the initial phase data by the data outputting circuit. As a result of the comparison, pulse width data corresponding to a difference between a value of one of the initial phase data and that of the input data and specified pulse amplitude data corresponding to the initial phase data are output when the phase corresponding to one of the initial phase data is earlier than the phase corresponding to the input data. In the phase data generating circuit, the phase data corresponding to a phase in the period is generated. In the data comparison circuit, the control signal is at the first level at the beginning of every period, the phase data and the pulse width data are compared, and the control signal is set at the second level when the phase data and the pulse width data coincide. The level of the pulse signal output from the pulse signal generating circuit is set at a reference level at the beginning of every period is changed in response to the value of the pulse amplitude data when the control signal is at the first level, and set at the reference level when the control signal is changed to the second level.
Preferably, each said modulation circuit comprises a first input terminal into which the pulse width data and the pulse amplitude data are input, a first output terminal from which the pulse width data and the pulse amplitude data are output, a second input terminal into which an enable signal is input, a second output terminal from which the enable signal is output, an enable signal generating circuit for outputting the enable signal from the second output terminal, when the enable signal input from the second input terminal changes from the enable state to the disenable state, said enable signal being set to an enable state for a predetermined period and then to a disenable state, and a data holding circuit for holding the pulse width data and the pulse amplitude data input from the first input terminal when the enable signal is in the enable state and outputting the held pulse width data and pulse amplitude data when the enable signal changes from the enable state to the disenable state, and the first output terminal and the second output terminal of each modulation circuit are connected in cascade with the first input terminal and the second input terminal of a modulation circuit at the next stage, respectively, and the phase data generating circuit sets the value of the phase data to a preset initial data when the enable signal is in the enable state and periodically changes the value of the phase data at said period when the enable signal is in the disenable state, and the data comparison circuit sets the control signal to the second level when the enable signal is in the enable state and compares a pulse width data output from the data holding circuit with the phase data when the enable signal is in the disenable state.